Flip chip mounting of integrated circuit dies on substrates is increasingly used. Ball grid array (BGA) and stacked packages incorporate the use of an integrated circuit having conductive terminals, such as solder balls or solder bumps, formed on bond pads, that are mounted with the active surface facing a substrate that has conductive lands arranged corresponding to the conductive terminals. The integrated circuit die is mounted to the substrate by a solder reflow process, for example. Alternatives for the conductive terminals include copper studs, copper bumps, or solder or copper pillars or columns. An underfill material may be provided beneath the integrated circuit die and surrounding the conductive terminals to provide thermal stress relief to the integrated circuit die. However, thermal stress and mechanical stress have been observed between the die and the substrate, particularly in the corner regions. Conventional approaches to the stress include forming copper regions in the corners of the substrate outside of the die area; however die to substrate stress problems such as substrate cracking are still observed. As integrated circuit dies continue to increase in area and the number of terminals increases, the line spacing and line width of the conductor traces on the substrate are reduced, and integrated circuit die to substrate stress continues to increase.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.